DAC output help

[JR.]

Yes simple inverter NG=2, simple follower NG=1. I killed a bunch of brain cells thinking about this last year or the year before and I did not come up with a simple, cost effective solution.

The VCA wants to see both a very low impedance at the Ec ports and very low noise. Using a resistor pad to feed the Ec ports knocks down the opamp noise but raises the source impedance. I don't recall if this was in Gary Hebert's AES paper about the new VCA series, or from an off list communication with him back before I lost my last hard drive and all footprints of our discussion. IIRC there is a distortion mechanism directly related to impedance at Ec ports. So higher impedance there means higher distortion. This perhaps is why most simple VCA applications short one to ground (and cost no doubt).

The cost effectiveness gets a little crazy because there is a temptation to use new uber-opamps for their 1nV input nose for simple CV processing. It is against my religion to throw two expensive uber opamps into the non-audio path, while with VCAs everything is arguably the audio path.

I suspect huge ass caps in connection with a resistive pad "could" work, but huge ass caps are almost as undesirable as uber opamps for PCB real estate consumed.

The somewhat odd configuration of inverting and non-inverting buffer I came up with, delivers slightly lower noise gain in the inverter and partial cancellation of that, but filtering in the CV line needs to kept away from the low impedance input R (1k in Juniors schematic) to keep the NG < 2. BUT.. this may be over thinking the problem with 4.5nV rt hz 5532 opamps. in the CV path, and who knows what other noise sources for the entire path may be dominant.

Another inconclusive post with TMI...

JR

[mediatechnology]

Yes simple inverter NG=2, simple follower NG=1.

I think that may have been my original point of comparison. Mine has NG=2 in two stages since it has two inverters. The noise is uncorrelated so they add by 3 dB.
Not as elegent as yours but maybe more easily trimmed to offset the Ec DAC.

IIRC there is a distortion mechanism directly related to impedance at Ec ports. So higher impedance there means higher distortion.

Yes there is. If high impedance, the control ports can be modulated by signal.
Though not an issue with the 5532, op amps with inductive-like outputs or high Ro, e.g. BIFETs or most rail-to-rail, are not a good idea.

I bet for juniorhifikit that 5532s will work fine here. The differential Ec+/Ec- drive has some nice advantages.

[juniorhifikit]

.

I bet for juniorhifikit that 5532s will work fine here. The differential Ec+/Ec- drive has some nice advantages.

So far I've been really pleased with the results, as has everyone else who's tested the device. I haven't had a chance to go back to the bench and fiddle with the bias placement (too much mixing/work), but perhaps over the weekend.

Anyone know anyone in Paris with an Audio Precision? I'd love to get some test results a bit more scientific than RMAA through a sound card...

[juniorhifikit]

Well, I had some time to experiment a little. Moving the bias to the top of C8 (and recalculating the series R for the scale) didn't help - I had another DAC channel latch-up. I did measure the bad channel's output to Vss and Vdd, and it's the same as the good channels ... I think I may need to look into delaying the startup of the bias regulator - perhaps with a regulator that has a sense pin (like an LT1175?)

[JR.]

Please provide a schematic of exactly what is connected to the DAC outputs now.

It is also possible the DAC was partially damaged before and failed later,,

If the DAC is only connected to the top of C8 through a few K resistor and still failed I am surprised. If the filter cap is in middle of around 12k so 6k per side, that will current limit the cap.

One surely fail safe approach, is to power your negative bias string from a simple inverting opamp with gain of say -3.5x from the +5V,, so the -12V or whatever is only there when 5V is present and tracks with rise and fall of the +5V supply.

We need to inspect any large value capacitors as sources of current but again they should be isolated by a few K so less harmful.

JR

[juniorhifikit]

Doh!

By your asking for the schematic, I went back and looked at what I'd done and realized that I still had a lower Z path back to the DAC than from the -12v bias supply. I was so busy getting the scale correct that I didn't pay attention to where I ended up! I'm going to put a bit more time into this (and more attention) and get right back to you.

Thanks!

[juniorhifikit]

How about something like this for soft-starting the bias:

[JR.]

The issue with the -12v supply is not just slow start, but if you want to manage that way it must fall before the +5v on turn off also.

If you're going to invest any effort into this approach a simple tracking supply can probably be made from one opamp... but this may not be necessary if we lighten up the impedances the DAC is seeing.

JR

[juniorhifikit]

Let me see if I've got this right: It seems that the scale of the VCA is determined by the maximum DAC output (4.1v) times the buffer's Rfb (1K in my case) divided by the total series resistance of the CV path (aprox 10K2 in my case) which lands around 400mV for each CV port - roughly half of the single port design shown in the data sheet. So far so good. If I were to raise the series resistance between the DAC and the buffer, and consequently the buffer's Rfb (to keep my scale correct) I feared I would be driving the CV port with too high an impedance, as it wants to see less than 50 Ohms. I was kind of under the impression that this was not a negotiable item.

In regards to my drawing on page 2, would I gain anything by removing C8 & R7 WRT this problem?

If you're going to invest any effort into this approach a simple tracking supply can probably be made from one opamp... but this may not be necessary if we lighten up the impedances the DAC is seeing.

I thought I wanted to increase the impedance between the DAC and the rest of the world, to keep stray start-up current flowing elsewhere. Now I am confused

As to a tracking supply, I assume you mean the bias supply tracking the 5v DAC supply? I just started hunting for a design...

[mediatechnology]

If I were to raise the series resistance between the DAC and the buffer, and consequently the buffer's Rfb (to keep my scale correct) I feared I would be driving the CV port with too high an impedance, as it wants to see less than 50 Ohms. I was kind of under the impression that this was not a negotiable item.

If we're talking about the original schematic, or the one I suggested, the VCA ports will see whatever the op amp output impedances are.
The feedback resistors will not significantly affect the output impedance or what the VCA sees.
The 5532 Ro will likely be <1 Ohm at DC.

I wouldn't go the tracking or sequenced suppy route. You're making it overly complicated IMHO.
I think the issue is to just keep the load the DAC sees >5K Ohm and prevent negative voltages (currents) from flowing into the DAC output.
Having a large value resistor between the DAC and the first LPF C is also warranted.

If you offset the DAC with a current injected into the first VCA buffer's inverting input, your negative offset current is limited by the trim and series resistance value and DAC series resistance.
That current is into a sum node anyway, not the DAC output. The 5532 is going to have internal back-to-back diodes from inverting to non-inverting input.
Even if the 5532 hasn't woken up you got two internal diodes there.

So what's wrong with this?

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